1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device using a crystalline semiconductor film. Note that the semiconductor device of the present invention includes as its category not only an element such as a thin film transistor or a MOS transistor, but an electronic equipment having a semiconductor circuit structured by these insulated gate type semiconductor elements, and electronic equipment such as a personal computer or a digital camera equipped with an electro-optical display device formed of an active matrix substrate (typically a liquid crystal display device or an EL display device).
2. Description of the Related Art
A thin film transistor (TFT) is presently known as a semiconductor element using a semiconductor film. A TFT is used as a switching element of a pixel section of an active matrix type liquid crystal display device. In recent years, the manufacture of TFTs using a polycrystalline silicon film, which has a higher mobility than that of an amorphous silicon film, in a semiconductor layer has become possible, and the change to high mobility TFTs is proceeding apace. As a result, it has become possible to manufacture not only the pixel section, but also driver circuits on the same substrate.
To form a polycrystalline silicon film conventionally, a method of direct film deposition of a polycrystalline silicon film by CVD after raising the substrate temperature; a method of crystallizing an amorphous silicon film, deposited by CVD or sputtering, in the solid state by heat treatment at 600 to 1100° C. for between 20 and 48 hours; and a method of irradiating an excimer laser, melting, and then recrystallizing an amorphous silicon film are known. The crystal grain size is larger, and the manufactured semiconductor element characteristics are better, in the polycrystalline silicon film in which the amorphous silicon film is crystallized, compared with the polycrystalline silicon film directly deposited on the substrate.
When crystallization is performed by heat treatment, if a glass substrate is used, then the upper limit of the process temperature becomes on the order of 600° C., and a long amount of time is required for the crystallization process. Further, 600° C. is near the minimum temperature at which silicon is crystallized, and if the temperature is 500° C. or less, then it is impossible to crystallize in an industrially reasonable amount of time.
To shorten the crystallization time, a quartz substrate having a high distortion point is used. The heat treatment temperature may be raised to about 1000° C., but the quartz substrate is extremely expensive compared to the glass substrate, and it is difficult to make it into a large surface area. On the other hand, the glass substrate possesses the advantages of being low cost and easily made into a large surface area, but has the disadvantage of low heat resistance. Corning 7059 glass, widely used in active matrix type liquid crystal display devices, has a glass distortion point of 593° C., and there arise fears that the substrate is warped or bent by heating it for several hours at a temperature of 600° C. or more. Due to this, in order to be able to use a glass substrate such as Corning 7059 glass, the crystallization process must be made at a lower temperature and for a shorter time.
A crystallization technique using an excimer laser is one technique in which the process can be made at a lower temperature and in a shorter time. Excimer laser light can provide a semiconductor film with an amount of energy equivalent to thermal annealing at approximately 1000° C. in a short amount of time, while imparting almost no thermal influence on the substrate, and a high crystallinity semiconductor film can be formed. However, an excimer laser has a dispersed energy distribution on the irradiation surface, and it is difficult to make the crystallinity of the crystalline semiconductor film obtained uniform, and therefore it is difficult to make the characteristics uniform for each TFT element.
The applicant of the present invention wholeheartedly researched a technique for making the crystallization temperature lower while using heat treatment, and the fruits of this research are shown in Japanese Patent Application Laid-open No. Hei 6-232059 and Japanese Patent Application Laid-open No. Hei 7-321339, or U.S. Pat. Nos. 5,843,225 and 5,895,933. The above published techniques are ones in which a crystalline silicon film is obtained by performing thermal annealing in a state where a small amount of a metallic element for promoting crystallization is added into an amorphous silicon film. It is possible to form crystalline silicon by thermal annealing at 450 to 600° C. for between 4 and 12 hours with this crystallization technique.
However, there is a problem with this crystallization technique in that the metallic element used for promoting crystallization remains in the crystalline silicon film. The metallic element harms the semiconductor characteristics of the silicon film, and therefore causes damage to the stability and the reliability of the TFT characteristics.
In order to resolve this problem, the inventors of the present invention developed a technique (gettering technique) of removing the crystallization promoting element from the crystalline silicon film, and disclose it in Japanese Patent Application Laid-open No. Hei 10-270363. This technique is one of selectively adding phosphorous into the crystalline silicon film and then performing thermal annealing. By thermal annealing, the nickel in the regions not added with phosphorous diffuses to the phosphorous added regions, and is captured therein. As a result, the metallic element concentration in the regions not added with phosphorous is reduced. The thermal annealing temperature can be set to 600° C. or less, a temperature which the glass substrate can withstand. There arises a disadvantage, however, that ten and few hours are required for the process. Furthermore, in order to form the phosphorous added regions, the region in which it is possible to form the element is limited, and this is a factor which hinders high integration.